A feedback strategy to improve the entropy of a chaos-based random bit generator

被引:72
|
作者
Addabbo, T [1 ]
Alioto, M [1 ]
Fort, A [1 ]
Rocchi, S [1 ]
Vignoli, V [1 ]
机构
[1] Univ Siena, Dept Informat Engn, I-53100 Siena, Italy
关键词
analog circuits; chaos; design methodology; nonlinear circuits; random number generation;
D O I
10.1109/TCSI.2005.856670
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, the guidelines to design a true random bit generator (TRBG) circuit with a predefined minimum entropy are discussed. The approach is proposed for a TRBG based on a one-dimensional piecewise-linear chaotic map; it does not require bit throughput reduction, and it is suitable for the development of integrated TRBG circuits. In particular, the proposed design strategy is based on a feedback control procedure that allows to dynamically change the system parameters for the correction of the circuit "nonidealities" (e.g., the circuit offsets). The correction algorithm does not require a direct measurement of the system "nonidealities" or of the effective value of the map parameters, but only a dynamic estimation of these quantities based on the observation of the TRBG output. The design approach is validated by a hardware prototype implemented on a field-programmable analog array. The results of the NIST FIPS 140-2 test suite, the DIEHARD test suite, and the Coron's Universal test, applied to the TRBG output sequences before and after a simple post processing without throughput reduction, are reported and discussed.
引用
收藏
页码:326 / 337
页数:12
相关论文
共 50 条
  • [1] Attack on a Chaos-Based "True" Random Bit Generator
    Ergun, Salih
    2015 IEEE 13TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), 2015,
  • [2] A Chaos-Based Pseudo-Random Bit Generator Implemented in FPGA Device
    Dabal, Pawel
    Pelka, Ryszard
    2011 IEEE 14TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS (DDECS), 2011, : 151 - 154
  • [3] Efficient post-processing module for a chaos-based random bit generator
    Addabbo, Tommaso
    Alioto, Massimo
    Fort, Ada
    Rocchi, Santina
    Vignoli, Valerio
    2006 13TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3, 2006, : 1224 - 1227
  • [4] A technique to design high entropy chaos-based true random bit generators
    Addabbo, Tommaso
    Alioto, Massimo
    Fort, Ada
    Rocchi, Santina
    Vignoli, Valerio
    2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS, 2006, : 1183 - +
  • [5] Batch and stream entropy with fixed partitions for chaos-based random bit generators
    Arai, Kenichi
    Davis, Peter
    PHYSICAL REVIEW E, 2021, 104 (03)
  • [6] A hybrid chaos-based pseudo-random bit generator in VHDL-AMS
    Melosik, Michal
    Marszalek, Wieslaw
    2014 IEEE 57TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2014, : 435 - 438
  • [7] Design of a low power high entropy chaos-based truly random number generator
    Zhou, Tong
    Zhou, Zhibo
    Yu, Mingyan
    Ye, Yizheng
    2006 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, 2006, : 1955 - +
  • [8] A chaos-based random number generator for eight-bit micro-controller system
    Tang, K. W.
    Kwok, H. S.
    Tang, Wallace K. S.
    Man, K. F.
    INTERNATIONAL JOURNAL OF BIFURCATION AND CHAOS, 2008, 18 (03): : 851 - 867
  • [9] A novel iris and chaos-based random number generator
    Zhu, Hegui
    Zhao, Cheng
    Zhang, Xiangde
    Yang, Lianping
    COMPUTERS & SECURITY, 2013, 36 : 40 - 48
  • [10] Vulnerability Analysis of a Chaos-Based Random Number Generator
    Ergun, Salih
    2018 IEEE INTERNATIONAL CONFERENCE ON SYSTEMS, MAN, AND CYBERNETICS (SMC), 2018, : 3331 - 3334