Effective abstractions for verification under relaxed memory models

被引:7
|
作者
Dan, Andrei [1 ]
Meshman, Yuri [2 ]
Vechev, Martin [1 ]
Yahav, Eran [2 ]
机构
[1] Swiss Fed Inst Technol, Zurich, Switzerland
[2] Technion, Haifa, Israel
关键词
Abstract interpretation; Relaxed memory models; EFFICIENT; PROGRAMS;
D O I
10.1016/j.cl.2016.02.003
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
We present a new abstract interpretation based approach for automatically verifying concurrent programs running on relaxed memory models. Our approach is based on three key insights: (i) Although the behaviors of relaxed memory models (e.g., TSO and PSO) are naturally captured by store buffers, directly using such encodings substantially decreases the accuracy of program analysis due to shift operations on buffer contents. The scalability and accuracy of program analysis can be greatly improved by eliminating the expensive shifting of store buffer contents, and we present a new abstraction of the memory model that accomplishes this goal. (ii) The precision of the analysis can be further improved by an encoding of store buffer sizes using leveraged knowledge of the abstract interpretation domain. (iii) A novel source-to-source transformation that realizes the above two techniques makes it possible to use of state-of-the-art analyzers directly under sequential consistency (SC): given a program P and a relaxed memory model M, it produces a new program PM where the behaviors of P running on M are over-approximated by the behavior of PM running on SC. We implemented our approach and evaluated it on a set of finite and infinite-state concurrent algorithms under two memory models: Intel's x86 TSO and PSO. Experimental results indicate that our technique achieves better precision and efficiency than prior work: we can automatically verify algorithms with fewer fences, faster and with lower memory consumption. (C) 2016 Elsevier Ltd. All rights reserved.
引用
收藏
页码:62 / 76
页数:15
相关论文
共 50 条
  • [1] Effective Abstractions for Verification under Relaxed Memory Models
    Dan, Andrei
    Meshman, Yuri
    Vechev, Martin
    Yahav, Eran
    [J]. VERIFICATION, MODEL CHECKING, AND ABSTRACT INTERPRETATION (VMCAI 2015), 2015, 8931 : 449 - 466
  • [2] Effective program verification for relaxed memory models
    Burckhardt, Sebastian
    Musuvathi, Madanlal
    [J]. COMPUTER AIDED VERIFICATION, 2008, 5123 : 107 - 120
  • [3] Partial-Coherence Abstractions for Relaxed Memory Models
    Kuperstein, Michael
    Vechev, Martin
    Yahav, Eran
    [J]. PLDI 11: PROCEEDINGS OF THE 2011 ACM CONFERENCE ON PROGRAMMING LANGUAGE DESIGN AND IMPLEMENTATION, 2011, : 187 - 198
  • [4] Partial-Coherence Abstractions for Relaxed Memory Models
    Kuperstein, Michael
    Vechev, Martin
    Yahav, Eran
    [J]. ACM SIGPLAN NOTICES, 2011, 46 (06) : 187 - 198
  • [5] Verification of STM on relaxed memory models
    Guerraoui, Rachid
    Henzinger, Thomas A.
    Singh, Vasu
    [J]. FORMAL METHODS IN SYSTEM DESIGN, 2011, 39 (03) : 297 - 331
  • [6] Verification of STM on relaxed memory models
    Rachid Guerraoui
    Thomas A. Henzinger
    Vasu Singh
    [J]. Formal Methods in System Design, 2011, 39 : 297 - 331
  • [7] Formal automatic verification of cache coherence in multiprocessors with relaxed memory models
    Pong, P
    Dubois, M
    [J]. IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2000, 11 (09) : 989 - 1006
  • [8] Interactive Debugging of Concurrent Programs under Relaxed Memory Models
    Verma, Aakanksha
    Kalita, Pankaj Kumar
    Pandey, Awanish
    Roy, Subhajit
    [J]. CGO'20: PROCEEDINGS OF THE18TH ACM/IEEE INTERNATIONAL SYMPOSIUM ON CODE GENERATION AND OPTIMIZATION, 2020, : 68 - 80
  • [9] BiRD: Race Detection in Software Binaries under Relaxed Memory Models
    Jain, Ridhi
    Purandare, Rahul
    Sharma, Subodh
    [J]. ACM TRANSACTIONS ON SOFTWARE ENGINEERING AND METHODOLOGY, 2022, 31 (04)
  • [10] A Verification Framework for Assembly Programs Under Relaxed Memory Model Using SMT Solver
    Maleehuan, Pattaravut
    Chiba, Yuki
    Aoki, Toshiaki
    [J]. IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2018, E101D (12): : 3038 - 3058