共 50 条
- [1] A New Schmitt Trigger with n-Channel Neuron-MOS Transistor [J]. 2015 11TH INTERNATIONAL CONFERENCE ON NATURAL COMPUTATION (ICNC), 2015, : 994 - 998
- [2] Ternary Schmitt Circuit Based on Neuron-MOS Transistor [J]. 2013 NINTH INTERNATIONAL CONFERENCE ON NATURAL COMPUTATION (ICNC), 2013, : 1748 - 1752
- [3] NOVEL CMOS SCHMITT TRIGGER WITH CONTROLLABLE HYSTERESIS [J]. ELECTRONICS LETTERS, 1992, 28 (07) : 639 - 641
- [5] PD/SOI CMOS Schmitt trigger circuits with controllable hysteresis [J]. 2001 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS, AND APPLICATIONS, PROCEEDINGS OF TECHNICAL PAPERS, 2001, : 283 - 286
- [6] Restoration of controllable hysteresis in partially depleted SOICMOS Schmitt trigger circuits [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2004, 51 (07): : 349 - 353
- [7] Advances in neuron-MOS applications [J]. 1996 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, DIGEST OF TECHNICAL PAPERS, 1996, 39 : 304 - 305
- [10] Dynamic Quaternary Circuit with Neuron-MOS Transistor [J]. 2015 11TH INTERNATIONAL CONFERENCE ON COMPUTATIONAL INTELLIGENCE AND SECURITY (CIS), 2015, : 129 - 133