Optimization of Material and Process for Fine Pitch LVSoP Technology

被引:17
|
作者
Eom, Yong-Sung [1 ]
Son, Ji-Hye [1 ]
Bae, Hyun-Cheol [1 ]
Choi, Kwang-Seong [1 ]
Choi, Heung-Soap [2 ]
机构
[1] ETRI, Components & Mat Res Lab, Taejon, South Korea
[2] Hongik Univ Sejong, Dept Mech & Design Engn, Sejong, South Korea
关键词
Maskless bumping; Sn/3.0Ag/0.5Cu; fine pitch; solder powder; resin; PCB; MELTING POINT SOLDER; CONDUCTIVE ADHESIVE; INTEGRATION; POLYMER; POWDER;
D O I
10.4218/etrij.13.1912.0007
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
For the formation of solder bumps with a fine pitch of 130 mu m on a printed circuit board substrate; low-volume solder on pad (LVSoP) technology using a maskless method is developed for SAC305 solder with a high melting temperature of 220 degrees C. The solder bump maker (SBM) paste and its process are quantitatively optimized to obtain a uniform solder bump height, which is almost equal to the height of the solder resist. For an understanding of chemorheological phenomena of SBM paste, differential scanning calorimetry, viscosity measurement, and physical flowing of SBM paste are precisely characterized and observed during LVSoP processing. The average height of the solder bumps and their maximum and minimum values are 14.7 mu m, 18.3 mu m, and 12.0 mu m, respectively. It is expected that maskless LVSoP technology can be effectively used for a fine-pitch interconnection of a Cu pillar in the semiconductor packaging field.
引用
收藏
页码:625 / 631
页数:7
相关论文
共 50 条
  • [1] Fine pitch stencil printing process modeling and optimization
    Li, Y
    Mahajan, RL
    Nikmanesh, N
    JOURNAL OF ELECTRONIC PACKAGING, 1996, 118 (01) : 1 - 6
  • [2] Fine geometry and fine pitch bumping process
    Viswanadam, Gautham
    Sathappan, Santhanesh
    Proceedings of the Electronic Packaging Technology Conference, EPTC, 1998, : 18 - 24
  • [3] Fine geometry and fine pitch bumping process
    Viswanadam, G
    Sathappan, S
    2ND ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, PROCEEDINGS, 1998, : 18 - 24
  • [4] HV-SoP Technology for Maskless Fine-Pitch Bumping Process
    Son, Jihye
    Eom, Yong-Sung
    Choi, Kwang-Seong
    Lee, Haksun
    Bae, Hyun-Cheol
    Lee, Jin-Ho
    ETRI JOURNAL, 2015, 37 (03) : 523 - 532
  • [5] Process Window Enhancement of Via Holes for Fine Pitch RDL by Design Optimization
    McCold, Cliff
    Hsieh, Robert
    Ha-Ai Nguyen
    Flack, Warren W.
    Slabbekoorn, John
    Miller, Andy
    2020 IEEE 70TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2020), 2020, : 1114 - 1119
  • [6] Fine pitch copper wire bonding on copper bond pad process optimization
    Lam, KW
    Ho, HM
    Stoukatch, S
    Van De Peer, M
    Ratchev, P
    Vath, CJ
    Schervan, A
    Beyne, E
    PROCEEDINGS OF THE 4TH INTERNATIONAL SYMPOSIUM ON ELECTRONIC MATERIALS AND PACKAGING, 2002, : 63 - 68
  • [7] Transferrable Fine Pitch Probe Technology
    Liu, Y.
    Wright, S. L.
    Dang, B.
    Andry, P.
    Polastre, R.
    Knickerbocker, J.
    2014 IEEE 64TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2014, : 1880 - 1884
  • [8] DEVELOPMENT OF ULTRA FINE WIRE AND FINE PITCH BONDING TECHNOLOGY
    YAMASHITA, T
    KANAMORI, T
    IGUCHI, Y
    ARAO, Y
    SHIBATA, S
    OHNO, Y
    OHZEKI, Y
    IEICE TRANSACTIONS ON COMMUNICATIONS ELECTRONICS INFORMATION AND SYSTEMS, 1991, 74 (08): : 2369 - 2377
  • [9] Fine and ultra-fine pitch assembly in emerging technology
    Deley, Mike
    Leonard, Jack
    Wheatley, David
    Electronic Packaging and Production, 1995, 35 (02): : 52 - 55
  • [10] Optimization of Thermocompression Bonding process for fine-pitch Flip-Chip applications
    Li, Jiang
    Dou, Guangbin
    Yin, Chunyan
    Ke, Zheng
    Wang, Gang
    2024 25TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY, ICEPT, 2024,