Research and Realization of Key Algorithm of ADS-B Overlapping Test

被引:0
|
作者
Yang, Yu [1 ]
Zhang, Chao [1 ]
机构
[1] Univ Elect Sci & Technol China, Res Inst Elect Sci & Technol, Chengdu 611731, Peoples R China
来源
关键词
Preamble detection; Overlapping test; Verilog; FPGA;
D O I
10.4028/www.scientific.net/AMR.403-408.1555
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
How to recognize the ADS-B messages is the key point of ADS-B receiver, and the preamble is the unique character of ADS-B messages. This paper describes a method for the overlapping test of the preamble detection. The FPGA implementation scheme is given in detail and the verilog HDL codes of this design is accomplished. The simulation result indicates that this method is viable and can detect the overlapping rapidly and accurately.
引用
收藏
页码:1555 / 1559
页数:5
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