VLSI based Space Vector Pulse Width Modulation switching control

An approach to generate space vector PWM (SVPWM) waveforms for three phase voltage sourced inverters using a low cost field programmable gate array (F PGA) is presented. The proposed scheme easily determines the location reference vector and calculation on times. It uses a simple mapping to generate gating signals for the inverter Space vector pulse width modulation strategy reduces the switching losses by limiting the switching to the two thirds of the pulse duty cycle. With proposed configuration the circuits for the adjustments of modulation index and phase angles are synthesized onto a FPGA by means of hardware description language(VHDL). since the VHDL statements, contrary to regular microprocessor programs, are inherently concurrent, high speed response for determination of circuit output can be achieved. The scheme can be easily extended to an n-Ievel inverter. A two level and three level of Neutral point clamped (NPC) inverter topology configuration is used explain in this scheme.