Single-chip baseband signal processor for software-defined radio

被引：0
|
作者：
Nishijima, S [1 ]
Saito, M [1 ]
Sugiyama, I [1 ]
机构：
[1] Fujitsu Ltd, Kawasaki, Kanagawa, Japan
来源：
FUJITSU SCIENTIFIC & TECHNICAL JOURNAL | 2006年 / 42卷 / 02期
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Reconfigurable processor technology offers a way to couple significant hardware performance improvements with realtime software signal processing. This technology enables software-defined radio (SDR) to be realized on a system-on-a-chip (SoC) platform. In this paper, we describe an SDR SoC LSI that is suitable for use in programmable wireless communication systems. The LSI has two advanced features. First, the hybrid architecture consists of reconfigurable signal processors and accelerator circuits. These accelerators are parametric circuits essential for baseband processing. Second, the reconfigurable processing elements have a cluster structure that improves the mapping efficiency and minimizes the processing time. We also describe a prototype SDR system that uses this LSI to perform software-defined IEEE802.11a and 11b communications.
引用
收藏
页码：240 / 247
页数：8
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