Analogue squarer and multiplier based on MOS square-law characteristic

A simple CMOS squarer based on MOS square-law characteristic is presented. This circuit was fabricated in a 0.8 mu m single-poly double-metal n-well CMOS process. Experimental results show that the nonlinearity of the squarer can be kept below 2% across the entire differential input voltage range of +/-1V. The total harmonic distortion is < 2% with the input range up to +/-0.8V. Moreover, a four-quadrant multiplier can be also realised using the proposed squarers. The proposed circuits are expected to be useful in analogue signal-processing applications.