Performance comparison for FinFETs, Nanowire and Stacked Nanowires FETs: Focus on the influence of Surface Roughness and Thermal Effects

被引：0
|
作者：
Badami, O. [1 ]
Driussi, F. [1 ]
Palestri, P. [1 ]
Selmi, L. [1 ]
Esseni, D. [1 ]
机构：
[1] Univ Udine, DPIA, Via Sci 206, I-33100 Udine, Italy
来源：
2017 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) | 2017年
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中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We perform a comprehensive comparison of FinFETs, stacked nanowires (stacked NWs), circular and square gate-all-around (GAA) n-FETs with same footprint, by using an in-house deterministic BTE solver accounting for quantum confinement, a wide set of scattering mechanisms and self-heating. We show that an increase in surface roughness (SR) can frustrate the improvement in on current, I-on that for high-quality interfaces we observe in stacked NWs compared to FinFETs. Simulations suggest that SR also influences whether or not In0.53Ga0.47As can provide better I-on than strained silicon (sSi).
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页数：4
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