High-Voltage solutions in standard CMOS

被引：0
|
作者：
Santos, PM [1 ]
Casimiro, AP [1 ]
Lanca, M [1 ]
Simas, MIC [1 ]
机构：
[1] Univ Tecn Lisboa, Inst Telecommun, Inst Super Tecn, P-1049001 Lisbon, Portugal
来源：
PESC 2001: 32ND ANNUAL POWER ELECTRONICS SPECIALISTS CONFERENCE, VOLS 1-4, CONFERENCE PROCEEDINGS | 2001年
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D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper will present trends on High-Voltage techniques for Power Integrated Circuits, using standard low cost CMOS technologies with no extra processing steps. MOS devices layout specificity towards performance improvement, namely breakdown, parasitic effects, and reliability, will be emphasized. Comparison with sophisticated and expensive HV technologies reveals CMOS cost-effective for power integration.
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页码：371 / 377
页数：7
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