Development of an Enhanced Selective Harmonic Elimination for a Single-Phase Multilevel Inverter with Staircase Modulation

被引:4
|
作者
Govind, S. [1 ]
Chappa, Anilkumar [2 ]
Rao, K. Dhananjay [3 ]
Dawn, Subhojit [3 ]
Ustun, Taha Selim [4 ]
机构
[1] Natl Inst Technol Raipur, Dept Elect Engn, Raipur 492010, Madhya Pradesh, India
[2] Sri Vasavi Engn Coll Autonomous, Dept Elect & Elect Engn, Tadepalligudem 534101, India
[3] Velagapudi Ramakrishna Siddhartha Engn Coll, Dept Elect & Elect Engn, Vijayawada 520007, India
[4] AIST FREA, Fukushima Renewable Energy Inst, Koriyama, Fukushima 9630298, Japan
关键词
multilevel inverter (MLI); selective harmonic elimination (SHE); total harmonic distortion (THD); staircase modulation; cumulative absolute error (CAE); CONVERTERS; VOLTAGE;
D O I
10.3390/electronics11233902
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
A low device switching frequency is recommended for the operation of multilevel inverters (MLIs) to achieve reduced switching losses. Selective harmonic elimination (SHE) and total harmonic distortion (THD) minimization are the two primary switching angle estimation methodologies for low-frequency modulation control. In this regard, a new generalized condition has been developed in this paper for the SHE technique. This original condition will give an output voltage with improved THD in comparison to the conventional SHE technique, while achieving its primary objective of eliminating the specific harmonic content from the output voltage. The proposed condition has been formulated by estimating the error associated with the staircase waveform and the desired sinusoidal output at the fundamental frequency. An infinite harmonic count has been considered for the evaluation of the quality of output, to obtain an accurate THD value without any underestimation. The proposed technique is analyzed, and its critical features are studied in Simulink. The effectiveness of the present work has been also validated by the experimental results.
引用
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页数:14
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