Influence of Parasitic Inductances on Switching Performance of SiC MOSFET

被引:1
|
作者
Li, Jinyuan [1 ]
Cui, Meiting [1 ]
Du, Yujie [1 ]
Ke, Junji [2 ]
Zhao, Zhibin [2 ]
机构
[1] State Grid Corp China, Global Energy Interconnect Res Inst, State Key Lab Adv Power Transmiss Technol, Beijing 102209, Peoples R China
[2] North China Elect Power Univ, State Key Lab Alternate Elect Power Syst Renewabl, Beijing 102206, Peoples R China
关键词
D O I
10.1051/e3sconf/20186404005
中图分类号
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号
0807 ; 0820 ;
摘要
Compared to the silicon power devices, silicon carbide device has shorter switch time. Hence, as a result of the faster transition of voltage (dv/dt) and current (di/dt) in SiC MOSFET, the influence of parasitic parameters on SiC MOSFET's switching transient is more serious. This paper gives an experimental study of the influence of parasitic inductance on SiC MOSFET's switching characteristics. Most significance parameters are the parasitic inductances of gate driver loop and power switching loop. These include the SiC MOSFET package's parasitic inductance, interconnect inductance and the parasitic inductance of dc link PCB trace. This paper therefore focuses on analysis and comparison of different parasitic parameters under various operation conditions in terms of their effect on overvoltage, overcurrent and switching power loss.
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页数:5
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