A 350-MS/s 3.3-V 8-bit CMOS D/A converter using a delayed driving scheme

High-end graphic systems with 3 million pixels require 8-bit D/A converters with more than 300-MS/s conversion rate. Furthermore, D/A converters need to operate with low supply voltage when they are integrated with large-scale digital circuits on a half-micron CMOS process. This paper describes a 350-MS/s 8-bit CMOS D/A converter with 3.3-V power supply. A current source circuit with a delayed driving scheme is developed. This driving scheme reduces a fluctuation of internal node voltage of the current source circuit and high-speed switching is realized. In addition to this driving schemes, two stages of latches are inserted into matris decoder for reducing glitch energy and for enhancing decoding speed. The D/A converter is fabricated in a 0.5-mu m CMOS process with single poly-silicon layer and double aluminum layers. Its settling time is less than 24 ns and it successfully operates at 350 MS/s.