Gate length dependent polysilicon depletion effects

被引:27
|
作者
Choi, CH [1 ]
Chidambaram, PR
Khamankar, R
Machala, CF
Yu, ZP
Dutton, RW
机构
[1] Stanford Univ, Ctr Integrated Syst, Stanford, CA 94305 USA
[2] Texas Instruments Inc, Dallas, TX 75243 USA
基金
美国国家科学基金会;
关键词
gate capacitance; gate length effect; impurity distribution effect; MOSFET; polydepletion; polysilicon depletion effect;
D O I
10.1109/55.992846
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Degradation of MOS gate capacitance in the inversion region becomes worse as the gate length is scaled down, according to a new experiment. Namely polysilicon depletion effect has gate length dependence. The origin of this gate length-dependent polydepletion effect has been modeled and verified by using device simulation. As a result, the gradient of dopant distribution resulting from ion implant is shown to be an additional potential drop in the polygate. In addition. the enlarged depletion width at the gate sidewall can worsen the polydepletion effect for very-small MOSFETs.
引用
收藏
页码:224 / 226
页数:3
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