CHIMPS: A C-LEVEL COMPILATION FLOW FOR HYBRID CPU-FPGA ARCHITECTURES

被引：24

作者：

Putnam, Andrew ^{[1
]}

Bennett, Dave ^{[1
]}

Dellinger, Eric ^{[1
]}

Mason, Jeff ^{[1
]}

Sundararajan, Prasanna ^{[1
]}

Eggers, Susan ^{[1
]}

机构：

[1] Xilinx Res Labs, Longmont, CO 80503 USA

来源：

2008 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE AND LOGIC APPLICATIONS, VOLS 1 AND 2 | 2008年

关键词：

D O I：

10.1109/FPL.2008.4629927

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper describes CHiMPS, a C-based accelerator compiler for hybrid CPU-FPGA computing platforms. CHiMPS's goal is to facilitate FPGA programming for high-performance computing developers. It inputs generic ANSIC code and automatically generates VHDL blocks for an FPGA. The accelerator architecture is customized with multiple caches that are tuned to the application. Speedups of 2.8x to 36.9x (geometric mean 6.7x) are achieved on a variety of HPC benchmarks with minimal source code changes.

引用

页码：173 / 178

页数：6

共 29 条

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