Frame-parallel design strategy for High Definition B-frame H.264/AVC encoder

被引：4
|
作者：
Chen, Yi-Hau [1 ]
Chuang, Tzu-Der [1 ]
Chen, Yu-Han [1 ]
Tsai, Chen-Han [1 ]
Chen, Liang-Gee [1 ]
机构：
[1] Natl Taiwan Univ, Grad Inst Elect Engn, DSP IC Design Lab, Taipei 10764, Taiwan
来源：
PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10 | 2008年
关键词：
D O I：
10.1109/ISCAS.2008.4541346
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
High Definition (HD) H.264/AVC video compression is the emerging necessity on nowadays home entertainment environment and so on. However, Although B-frame coding scheme provides better quality, only P-frame encoders are presented due to too high complexity and memory requirement. In this paper, a frame-parallel encoding scheme based on B-frame's data independency is proposed. It can largely reduce the system memory bandwidth and improve the processing capability. Then, the proposed IME and FME scheduling can further enhance the hardware utilization for frame-parallel scheme. Finally, a case study is given to show that the proposed scheme can largely reduce 66% system bandwidth compared to direct implementation from previous P-frame encoder.
引用
收藏
页码：29 / 32
页数：4
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