A Decomposition-Based System Level Synthesis Method for Heterogeneous Multiprocessor Architectures

Multiprocessing can be considered the most characteristic common property of complex digital systems. Due to the more and more complex tasks to be solved for fulfilling often conflicting requirements (cost, speed, energy and communication efficiency, pipelining, parallelism, the number of component processors, etc.), the so called heterogeneous multiprocessor architectures (HMPA) have become unavoidable. The component processors of such systems may be not only general purpose CPUs or cores, but also DSPs, GPUs, FPGAs and other custom hardware components as well. The hierarchy of the component processors and the data transfer organization between them are strongly determined by the task to be solved and by the priority order of the requirements to be fulfilled. For each component processor of HMPAs, a subtask must be defined based on the requirements and their priority orders. The definition of the subtasks, i.e. the decomposition of the task influences strongly the cost and performance of the whole system. Therefore, comparing and evaluating the effects of different task decompositions performed by applying systematic algorithms may help the designer to approach the optimal decisions in the system level synthesis phase. For this purpose, the paper presents a novel method based on combining the decomposition and the modified high level synthesis algorithms. The application of the method is illustrated on redesigning and evaluating in some versions of a high performance embedded multiprocessing system.