A flipped-voltage-follower-based low-dropout regulator with signal- and transient-current boosting

被引：2
|
作者：
Woo, Yuet Ho [1 ]
Ho, Koi Shu [1 ]
Lin, Yajun [1 ]
Zhou, Yong [1 ]
Leung, Ka Nang [1 ]
Zheng, Yanqi [2 ]
Guo, Jianping [3 ]
机构：
[1] Chinese Univ Hong Kong, Dept Elect Engn, Hong Kong, Peoples R China
[2] South China Univ Technol, Sch Elect & Informat Engn, Guangzhou, Guangdong, Peoples R China
[3] Sun Yat Sen Univ, Sch Elect & Informat Technol, Guangzhou, Peoples R China
来源：
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING | 2020年 / 105卷 / 03期
基金：
中国国家自然科学基金;
关键词：
Line transient response; Load transient response; Loop gain; Low-dropout regulator; Power-supply rejection ratio; Signal; and transient-boosting; LDO;
D O I：
10.1007/s10470-020-01727-5
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A flipped-voltage-follower-based low-dropout regulator (FVF-LDO) with signal- and transient-current boosting (STCB) is proposed in this paper. The embedded STCB structure to FVF-LDO enhances both loop gain and loop bandwidth, while the FVF-LDO remains its double-pole single-zero property within the loop bandwidth and can be stabilized by an external output capacitor to achieve dominant-pole frequency compensation. The proposed LDO designed in a 65-nm CMOS technology operates at a minimum of 1 V, provides an output of 0.85 V, and delivers a maximum of 50 mA. The figure-of-merit of proposed FVF-LDO is 1.98 ps.
引用
收藏
页码：471 / 476
页数：6
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