Integrated simulation flow for self-consistent manufacturability and circuit performance evaluation

In this work we present an application of a novel DFM (Design For Manufacturability) simulation flow, which self-consistently predicts the impact of the manufacturing process on electrical circuit behavior. We apply our methodology to the design of a 2x2 AND-OR standard cell to show its effectiveness. We show that process distortions significantly impact both DC and transient circuit behavior, and have to be considered for accurate timing analysis, prediction of IDDQ and other circuit characteristics. Intrinsic process variability and process excursions cause additional deviation from design intent and therefore performance issues and potential yield losses. This work extends and generalizes concepts introduced in [1-2] and presents an integrated implementation of a self-consistent simulation flow [3] which provides unique insight into process-design interactions.