Trapping and Reliability Assessment in D-Mode GaN-Based MIS-HEMTs for Power Applications

This paper reports on an extensive analysis of the trapping processes and of the reliability of experimental AlGaN/GaN MIS-HEMTs, grown on silicon substrate. The study is based on combined pulsed characterization, transient investigation, breakdown, and reverse-bias stress tests, and provides the following, relevant, information: 1) the exposure to high gatedrain reverse-bias may result in a recoverable increase in the on-resistance (R-ON), and in a slight shift in threshold voltage; 2) devices with a longer gate-drain distance show a stronger increase in R-ON, compared to smaller devices; 3) current transient measurements indicate the existence of one trap level, with activation energy of 1.03 +/- 0.09 eV; and 4) we demonstrate that through the improvement of the fabrication process, it is possible to design devices with negligible trapping. Furthermore, the degradation of the samples was studied by means of step-stress experiments in off-state. Results indicate that exposure to moderate-high reverse bias (<250 V for L-GD = 2 mu m) does not induce any measurable degradation, thus confirming the high reliability of the analyzed samples. A permanent degradation is detected only for very high reverse voltages (typically, V-DS = 260-265 V, on a device with L-GD = 2 mu m stressed with V-GS = -8 V) and consists of a rapid increase in gate leakage current, followed by a catastrophic failure. EL measurements and microscopy investigation revealed that degradation occurs close to the gate, in proximity of the sharp edges of the drain contacts, i.e., in a region where the electric field is maximum.