Application-Specific Network-on-Chip synthesis with flexible router Placement

被引:12
|
作者
Soumya, J. [1 ]
Chattopadhyay, Santanu [1 ]
机构
[1] Indian Inst Technol, Dept Elect & Elect Commun Engn, Kharagpur 721302, W Bengal, India
关键词
Communication cost; Application Specific Network-on-Chip; Particle Swarm Optimization; Integer Linear Programming; DESIGN; FLOW;
D O I
10.1016/j.sysarc.2013.05.013
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Network-on-Chip (NoC) has been proposed as a possible solution to the communication problem in nano-scale System-on-Chip (SoC) design. NoC architectures with optimized application-specific topologies have been found to be superior to the regular architectures in designing Multi-Processor System-on-Chip (MPSoC) solutions. The application specific NoC design problem takes as input the chip floorplan, library of NoC components, and communication requirements between the tasks of the application. It outputs the positions of the routers in the floorplan, such that, all communication requirements of the application are satisfied. This paper presents an Integer Linear Programming formulation of the problem, followed by a heuristic technique based on Particle Swarm Optimization (PSO) for finding the router positions from the set of available positions within the chip floorplan. The goal is to minimize the communication cost between cores, satisfying both the link length and router port constraints. The results have been shown on realistic benchmarks. Comparisons have been carried out with regular mesh and custom architectures having routers positioned at (i) the corners of the cores, (ii) the centers of the cores, and (iii) the intersections of the cores. Significant reductions in communication cost have been observed over all the cases. For smaller benchmarks, the optimum results obtained via ILP matches exactly with those reported by the PSO. Many of the existing router placement policies fail even for these small benchmarks, when restrictions are imposed on permissible link length. This establishes the merit of the PSO formulation. Link and router energy consumption of the synthesized NoC have been compared with regular mesh based architectures. The results show significant reduction in communication cost, area overhead, link energy and router energy in the synthesized NoC over regular mesh topology as well. (C) 2013 Elsevier B.V. All rights reserved.
引用
收藏
页码:361 / 371
页数:11
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