共 50 条
- [1] Power and signal integrity design of TSV in 3D ring oscillator [J]. Yepremyan, Lia (ylia@synopsys.com), 2016, Institute of Electrical and Electronics Engineers Inc., United States
- [2] Signal Integrity Modeling and Measurement of TSV in 3D IC [J]. 2013 18TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2013, : 13 - 16
- [3] Signal Integrity Design of TSV and Interposer in 3D-IC [J]. 2013 IEEE 4TH LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS (LASCAS), 2013,
- [4] Substrate Noise Suppression Technique for Power Integrity of TSV 3D Integration [J]. 2012 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 2012), 2012,
- [5] Power and Signal Integrity Challenges in 3D Systems [J]. 2013 50TH ACM / EDAC / IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2013,
- [6] Managing Signal, Power and Thermal Integrity for 3D Integration [J]. 2014 IEEE INTERNATIONAL TEST CONFERENCE (ITC), 2014,
- [7] New Electrical Design Verification Approach for 2.5D/3D Package Signal and Power Integrity [J]. PROCEEDINGS OF THE FOURTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2013), 2013, : 30 - 30
- [8] GTL High Speed I/O in 3D ICs for TSV and Interconnect Signal Integrity Characterization [J]. 2012 IEEE 62ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2012, : 844 - 850
- [9] Power Efficient 3D Clock Distribution Network Design with TSV Count Optimization [J]. PROCEEDINGS OF THE 6TH INTERNATIONAL CONFERENCE ON ADVANCES IN COMPUTING AND COMMUNICATIONS, 2016, 93 : 169 - 175
- [10] GUIDELINE TO AVOID CRACKING IN 3D TSV DESIGN [J]. 2010 12TH IEEE INTERSOCIETY CONFERENCE ON THERMAL AND THERMOMECHANICAL PHENOMENA IN ELECTRONIC SYSTEMS, 2010,