SQNR Improvement in Fixed-Point FFT Architecture

被引：0

作者：

Jain, Pulkit ^{[1
]}

Mallik, Debjyoti ^{[2
]}

Jatana, H. S. ^{[2
]}

Gill, S. S. ^{[3
]}

机构：

[1] GNDEC, Ludhiana, Punjab, India

[2] SCL, VLSI Design Dept, Ludhiana, Punjab, India

[3] GNDEC, ECE, Ludhiana, Punjab, India

来源：

2017 INTERNATIONAL CONFERENCE ON COMPUTING AND COMMUNICATION TECHNOLOGIES FOR SMART NATION (IC3TSN) | 2017年

关键词：

EFT; OFDM; GPS; DIT; SQNR;

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

In Digital Signal Processing (DSP), Fast Fourier Transform (FFT) algorithm and its hardware implementation play a significant role. To implement FFT in hardware, fixed point arithmetic is preferred as it is simple to execute and also saves area and power. The finite hit representation of signals and coefficients in fixed point result in quantization error which degrades FFT performance mainly Signal to Quantization Noise Ratio (SQNR). In this paper, SQNR improvement in fixed-point FFT is achieved by modifying Radix-2 Decimation In Time (DIT) conventional butterfly structure.

引用

页码：226 / 230

页数：5

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