Low-Capacitance, High-CDM ESD Protection Design with FEOL and BEOL Co-Optimization in 4nm Bulk FinFET Technology

被引：0

作者：

Chang, Yi-Feng ^{[1
]}

Yang, Han-Jen ^{[1
]}

Chang, Tzu-Heng ^{[1
]}

Lee, Jam-Wem ^{[1
]}

Chen, Kuo-Ji ^{[1
]}

机构：

[1] Taiwan Semicond Mfg Co, Dept ESD EOS Technol, Hsinchu, Taiwan

来源：

2022 44TH ANNUAL EOS/ESD SYMPOSIUM (EOS/ESD) | 2022年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, a low-capacitance silicon-controlled rectifier (LCSCR) structure with high-CDM robustness are proposed for high-speed I/O ESD protection. The LCSCR implemented with TSMC 4nm bulk FinFET technology can achieve high ESD robustness (>9A), low capacitance (<120fF) and low dynamic on-resistance (<0.5ohm) with compact geometry.

引用

页数：5

共 3 条

[1] Low-Capacitance SCR for On-Chip ESD Protection with High CDM Tolerance in 7nm Bulk FinFET Technology
Peng, Po-Lin
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Su, Yu-Ti
Lee, Jam-Wem
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Song, Ming-Hsiang
2019 41ST ANNUAL EOS/ESD SYMPOSIUM (EOS/ESD), 2019,
[2] Low-capacitance ESD protection design for high-speed I/O interfaces in a 130-nm CMOS process
Hsiao, Yuan-Wen
Ker, Ming-Dou
MICROELECTRONICS RELIABILITY, 2009, 49 (06) : 650 - 659
[3] High Performance 5G mobile SoC Design-Technology Co-Optimization for PPA and Manufacturability with 5nm EUV FinFET technology
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Bao, Jerry
Lin, Vicki
Kuo, Wade
Kim, Leo
Chen, Ying
Wang, Hao
Gao, Yandong
Cheng, Jason
Wang, Xiao-Yong
Park, Hyuk
Lim, Hochul
Kim, Sungwon
Shin, Hun
Song, Byungmoo
Masuoka, Yuri Y.
Kim, Taegyun
Ku, Ja-Hum
Nallapati, Giri
Yang, Sam
Chidambaram, PR.
2022 INTERNATIONAL ELECTRON DEVICES MEETING, IEDM, 2022,

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