Error-Prediction Analyses in 1X, 2X and 3Xnm NAND Flash Memories for System-Level Reliability Improvement of Solid-State Drives (SSDs)

被引：0

作者：

Tanakamaru, Shuhei ^{[1
]}

Doi, Masafumi ^{[1
]}

Takeuchi, Ken ^{[1
]}

机构：

[1] Chuo Univ, Dept Elect Elect & Commun Engn, Tokyo 112, Japan

来源：

2013 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS) | 2013年

关键词：

NAND flash memory; error-correcting code; ECC; low-density parity-check; LDPC; CELL; INTERFERENCE;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The system-level reliability of solid-state drives (SSDs) is investigated with 1X, 2X and 3Xnm NAND flash memories. The reliability degradation of NAND with scaling is an serious issue. Advanced ECC with signal processing such as error-prediction low-density parity-check (EP-LDPC) and error recovery (ER) scheme will be needed in the future SSDs. In this paper, the NAND reliability information used for EP-LDPC and ER is examined. System-level reliability with conventional ECC and EP-LDPC is measured.

引用

页数：6

共 2 条

[1] System-Level Error Correction by Read-Disturb Error Model of 1Xnm TLC NAND Flash Memory for Read-Intensive Enterprise Solid-State Drives (SSDs)
Deguchi, Yoshiaki
Tokutomi, Tsukasa
Takeuchi, Ken
[J]. 2016 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2016,
[2] Modeling the Endurance Reliability of Intradisk RAID Solutions for Mid-1X TLC NAND Flash Solid-State Drives
Zambelli, Cristian
Marelli, Alessia
Micheloni, Rino
Olivo, Piero
[J]. IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2017, 17 (04) : 713 - 721

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