Numerical modeling for topographical evolution of a 3D micro-electronic device structure

In this paper, we propose a novel method for topography simulation in micro-electronic processes such as deposition and etching processes. The proposed scheme is comprised of steps to calculate the forward and the backward movements of the surface and to convert the cell structure into a tetrahedral mesh structure with topological information. Memory requirements are eased through a dynamic allocation scheme that considers only the surface cells under consideration. For the removal of cells, a fixed time step is employed while the volume remains in the surface cells. A spillover algorithm is devised in order to consider the case when more volume has to be removed from a cell during a single time step. Our proposed scheme was applied to the cases such as the construction of a thin film transistor-liquid crystal display (TFT-LCD) structure, a read only memory (ROM) cell, and a dynamic random access memory (DRAM) cell. A numerical simulator was interfaced with the topography simulator for a successful finite-element method (FEM) meshing operation with the DRAM cell structure.