Voltage Collapse Mitigation by using SVC and Phase-Plane Trajectory Analysis

被引:0
|
作者
Nandi, Champa [1 ]
Chakraborty, Ajoy Kumar [2 ]
机构
[1] Tripura Univ, Dept Elect Engn, Suryamaninagar, India
[2] NIT, Dept Elect Engn, Agartala, India
关键词
SVC; Voltage Collapse; Post fault clearing time; Phase-Plane Trajectory;
D O I
暂无
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
This paper deals with modeling and simulation of SVC in IEEE 14 bus System with Induction Motor load for avoiding voltage collapse. Voltage collapse can be simply described by insufficient reactive power support to the load bus. Three Phases to ground fault is applied in predominant Induction motor load bus for voltage collapse analysis. Due to fault, chaotic behavior is present in power system network during fault time interval. The effect of Post Fault Clearing Time [PFCT] of the system after facing the fault, to prevent permanent voltage collapse has been analyzed with and without SVC. A simple method is used for analyzing the phase-plane trajectory. The Phase-Plane trajectory is calculated from the computer simulation waveform data. Chaotic behavior has been observed in computer simulations for an IEEE 14 bus power system network including SVC.
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页数:6
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