Special-purpose computer for electroholography in embedded systems

被引:8
|
作者
Yamamoto, Yota [1 ]
Masuda, Nobuyuki [2 ]
Hirayama, Ryuji [2 ,3 ]
Nakayama, Hirotaka [4 ]
Kakue, Takashi [1 ]
Shimobaba, Tomoyoshi [1 ]
Ito, Tomoyoshi [1 ]
机构
[1] Chiba Univ, Grad Sch Sci & Engn, Inage Ku, 1-33 Yayoi Cho, Chiba 2638522, Japan
[2] Tokyo Univ Sci, Fac Ind Sci & Technol, Katsushika Ku, 6-3-1 Niijuku, Tokyo 1258585, Japan
[3] Japan Soc Promot Sci, Chiyoda Ku, 5-3-1 Kojimachi, Tokyo 1020083, Japan
[4] Natl Astron Observ Japan, 2-21-1 Mitaka Shi, Tokyo 1818588, Japan
关键词
COMPUTATIONAL CHIP; HOLOGRAPHY; DISPLAY; UNIT; PERFORMANCE;
D O I
10.1364/OSAC.2.001166
中图分类号
O43 [光学];
学科分类号
070207 ; 0803 ;
摘要
Electroholography is attracting attention as an ideal 3D image presentation method. Developing such methods involves significant computational complexity; thus, they are difficult to realize. Typically, large cluster systems with a control PC and a field-programmable gate array (FPGA) acceleration board are used to reduce hologram calculation time. However such systems cannot be used for embedded 3D systems, such as a head-mounted display. In this study, we developed a compact holographic computer using a Xilinx Zynq UltraScale + MPSoC with an ARM CPU and an FPGA on a single chip. The proposed system can reproduce a 3D video at 15 frames per second for a spatial light modulator of 1,920 x 1,080 pixels from an object represented by 6,500 point cloud sources. The proposed system can be embedded in various systems, e.g., head-mounted displays and 3D televisions. (C) 2019 Optical Society of America under the terms of the OSA Open Access Publishing Agreement
引用
收藏
页码:1166 / 1173
页数:8
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