Checking component-based embedded software designs for scenario-based timing specifications

被引:0
|
作者
Hu, J [1 ]
Yu, XF [1 ]
Zhang, Y [1 ]
Zhang, T [1 ]
Li, XD [1 ]
Zheng, GL [1 ]
机构
[1] Nanjing Univ, Dept Comp Sci & Technol, State Key Lab Novel Software Technol, Nanjing 210093, Jiangsu, Peoples R China
关键词
embedded software designs; real-time systems; model checking; interface automata; UML sequence diagrams;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, for real-time embedded software we consider the problem of checking component-based designs for scenario-based timing specifications. By adding time intervals on the actions, we extend the interface automata for modelling real-time systems. The component-based designs are modelled by real-time interface automaton networks, which includes a set of real-time interface automata synchronized by shared actions, and the scenario-based timing specifications are specified by UML sequence diagrams with a set of boolean expressions. Based on analyzing the compatible integer state space of a real-time interface automaton network and its compatible reachability graph, we develop an algorithm to check the consistency between real-time component-based designs and the scenario-based timing specifications.
引用
收藏
页码:395 / 404
页数:10
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