The SPEEDES-based Run-Time Infrastructure for the High-Level Architecture on high-performance computers

This paper describes a new Run-Time Infrastructure (RTI) for the High-Level Architecture (HLA) that executes on massively parallel high-performance computers. Currently under development, this new RTI uses the Synchronous Parallel Environment for Emulation and Discrete-Event Simulation (SPEEDES) framework to coordinate all HLA services between legacy simulations and native SPEEDES simulations. First, this paper provides an overview of the SPEEDES architecture, including topics such as communications, event management, time management, and the SPEEDES Modeling Framework. This paper then shows how SPEEDES supports HLA on high-performance computers. Three primary HLA tasks are discussed: (1) development of an HLA gateway that allows SPEEDES simulations to interoperate with other federations, (2) development of RTI interfaces between SPEEDES and external simulations executing in a networked environment, and (3) development of an RTI for simulations running on high-performance computers. In tasks (2) and (3), SPEEDES functions as both a simulation engine and an RTI. All combinations of SPEEDES simulations, HLA federations, and HLA federates can interoperate in a single conglomerate execution.