Design of low-power, low-voltage, differential I/O links for High Energy Physics applications

被引：1
|
作者：
Traversi, G. [1 ,3 ]
Bonacini, S. [4 ]
De Canio, F. [2 ,3 ]
Gaioni, L. [1 ]
Kloukinas, K. [4 ]
Manghisoni, M. [1 ,3 ]
Ratti, L. [2 ,3 ]
Re, V. [1 ,3 ]
机构：
[1] Univ Bergamo, Dept Engn & Appl Sci, Dalmine, BG, Italy
[2] Univ Pavia, Dept Elect Comp & Biomed Engn, I-27100 Pavia, Italy
[3] Ist Nazl Fis Nucl, I-27100 Pavia, Italy
[4] CERN, CH-1211 Geneva 23, Switzerland
来源：
JOURNAL OF INSTRUMENTATION | 2015年 / 10卷
关键词：
VLSI circuits; Analogue electronic circuits; CMOS;
D O I：
10.1088/1748-0221/10/01/C01055
中图分类号：
TH7 [仪器、仪表];
学科分类号：
0804 ; 080401 ; 081102 ;
摘要：
This work presents the design of a low-power, differential signaling, input/output data link in a 65 nm CMOS process for high energy physics (HEP) experiments. The proposed driver, able to operate at 320 Mbps or 640 Mbps with a normalized power dissipation of 3.125 mW/Gbps, is meant to drive short distance (between 2 and 10 cm) transmission lines located to the module hybrid circuit. A de-emphasis technique has been adopted to reduce the impedance mismatch effects between the driver output and the transmission line. This paper will discuss in detail the solutions implemented in the design and will describe the simulation results.
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页数：8
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