共 50 条
- [1] Three-Dimensional Stacking FPGA Architecture Using Face-to-Face Integration [J]. 2013 IFIP/IEEE 21ST INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSI-SOC), 2013, : 192 - 197
- [2] Three-dimensional silicon integration [J]. IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 2008, 52 (06) : 553 - 569
- [3] Three-dimensional silicon integration [J]. IBM Journal of Research and Development, 2008, 52 (06): : 553 - 569
- [4] Three-dimensional integration in silicon electronics [J]. IEEE LESTER EASTMAN CONFERENCE ON HIGH PERFORMANCE DEVICES, PROCEEDINGS, 2002, : 24 - 33
- [5] Three-Dimensional Stacking of Silicon Chips - An Industrial Viewpoint [J]. 2013 28TH SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY AND DEVICES (SBMICRO 2013), 2013,
- [6] Mechanical and Electrical Reliability Assessment of Stacking of Ultrathin Chips on Si Interposer Using Back-to-Face Architecture [J]. Journal of Electronic Materials, 2014, 43 : 685 - 694
- [8] Three-dimensional integration of silicon chips for automotive applications [J]. Enabling Technologies for 3-D Integration, 2007, 970 : 103 - 113
- [10] Low-frequency Testing of Through Silicon Vias for Defect Diagnosis in Three-dimensional Integration Circuit Stacking Technology [J]. 2014 IEEE 64TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2014, : 1986 - 1991