A back-to-face silicon layer stacking for three-dimensional integration

被引:5
|
作者
Tan, CS [1 ]
Chen, KN [1 ]
Fan, A [1 ]
Reif, R [1 ]
机构
[1] MIT, Microsyst Technol Labs, Cambridge, MA 02139 USA
关键词
D O I
10.1109/SOI.2005.1563545
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:87 / 89
页数:3
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