A Low-Power, Low-Noise Neural Recording Amplifier for Implantable Biomedical Devices

This paper presents a low power and low noise neural amplifier IC for processing both action potential and local field potential signals in neural implant devices. Based on a capacitive feedback topology, the core operational transconductance amplifier utilizes a two-stage structure with current buffer achieving wide bandwidth, large output swing, and small area. The proposed neural amplifier is designed using 0.18 mu m CMOS process and achieves 46 dB gain, a bandwidth of 0.9 Hz-13.8 kHz, and integrated input-referred noise of 5 mu V-rms in the range of 1 Hz to 10 kHz. The noise efficiency factor of the designed neural amplifier is 2.6 and consumes 2 A of current from a 1.2 V supply with an area of 0.136 mm(2).