Solid or split ground in ADC systems

被引:0
|
作者
Castro-Serrato, C [1 ]
Pechlaner, A [1 ]
Gledhill, R [1 ]
Omer, M [1 ]
机构
[1] Infineon Technol, AIM SGM MSE Motorsport Elect, D-81541 Munich, Germany
关键词
analogue-to-digital converter; signal-to-noise ratio and effective number of bits (ENOB);
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
An analogue-to-digital converter (ADC) system was developed and analysed to try to clarify the long-running discussion about the best grounding technique for these kinds of systems. The PCB for this project was designed with two independent ADCs. It is possible to choose a "split" analogue and digital ground or a "solid" ground plane for each of the ADCs in order to compare the performance of the converters depending on the ground configuration.
引用
收藏
页码:379 / 382
页数:4
相关论文
共 50 条
  • [1] Enhanced split-architecture Δ-Σ ADC
    Lee, K.
    Temes, G. C.
    [J]. ELECTRONICS LETTERS, 2006, 42 (13) : 737 - 739
  • [2] Calibration for Split Capacitor DAC in SAR ADC
    Li, Zhe
    Lu, Yuxiao
    Mo, Tingting
    [J]. 2013 IEEE 10TH INTERNATIONAL CONFERENCE ON ASIC (ASICON), 2013,
  • [3] IDENTIFICATION OF THE RELATIVE POPULATION OF SPIN ORBIT SPLIT STATES IN THE GROUND-STATE OF A SOLID
    VANDERLAAN, G
    THOLE, BT
    SAWATZKY, GA
    FUGGLE, JC
    KARNATAK, R
    ESTEVA, JM
    LENGELER, B
    [J]. JOURNAL OF PHYSICS C-SOLID STATE PHYSICS, 1986, 19 (05): : 817 - 827
  • [4] Background Self-Calibration Algorithm for Pipelined ADC Using Split ADC Scheme
    Yagi, Takuya
    Usui, Kunihiko
    Matsuura, Tatsuji
    Uemori, Satoshi
    Ito, Satoshi
    Tan, Yohei
    Kobayashi, Haruo
    [J]. IEICE TRANSACTIONS ON ELECTRONICS, 2011, E94C (07): : 1233 - 1236
  • [5] SPLIT-ADC BASED DIGITAL BACKGROUND CALIBRATION FOR TIME-INTERLEAVED ADC
    Zhang Rui Yin Yongsheng Gao Minglun (Institute of Very Large Scale Integration
    [J]. Journal of Electronics(China), 2012, (Z2) : 302 - 309
  • [6] SPLIT-ADC BASED DIGITAL BACKGROUND CALIBRATION FOR TIME-INTERLEAVED ADC
    Zhang Rui Yin Yongsheng Gao Minglun Institute of Very Large Scale Integration Hefei University of Technology Hefei China
    [J]. JournalofElectronics(China)., 2012, 29(Z2) (China) - 309
  • [7] A Single-Ended ADC with Split Dual-Capacitive-Array for Multi-Channel Systems
    Cho, Seong-Jin
    Kim, Ju Eon
    Shin, Dong Ho
    Yoon, Dong-Hyun
    Jung, Dong-Kyu
    Jeon, Hong Tae
    Lee, Seok
    Baek, Kwang-Hyun
    [J]. JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2015, 15 (05) : 504 - 510
  • [8] A Split Transconductor High-Speed SAR ADC
    Muratore, Dante Gabriel
    Bonizzoni, Edoardo
    Maloberti, Franco
    [J]. 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2015, : 2433 - 2436
  • [9] All-Digital Background Calibration of a Successive Approximation ADC Using the "Split ADC" Architecture
    McNeill, John A.
    Chan, Ka Yan
    Coln, Michael C. W.
    David, Christopher L.
    Brenneman, Cody
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2011, 58 (10) : 2355 - 2365
  • [10] "Split ADC" Calibration for All-Digital Correction of Time-Interleaved ADC Errors
    McNeill, John A.
    David, Christopher
    Coln, Michael
    Croughwell, Rosa
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2009, 56 (05) : 344 - 348