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VDMOSFET HEF degradation modelling considering turn-around phenomenon
被引:7
|作者:
Ye, X. R.
[1
]
Chen, C.
[1
]
Wang, Y. X.
[1
]
Wang, L.
[1
]
Zhai, G. F.
[1
]
机构:
[1] Harbin Inst Technol, Dept Elect Engn & Automat, Harbin, Heilongjiang, Peoples R China
基金:
中国国家自然科学基金;
关键词:
Power VDMOSFET;
Degradation model;
High electric field;
Turn-around phenomenon;
BIAS TEMPERATURE INSTABILITY;
CHANNEL POWER VDMOSFETS;
D O I:
10.1016/j.microrel.2017.11.015
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
Gate oxide failure of power VDMOSFET has been researched for a long time. For BTI parameter degradation, some models are proposed. However, the degradation modelling of HEF still have challenges, one of which is the turn-around phenomenon. Due to the existence of the turn-around point, the threshold voltage degradation model under HEF cannot be described using classical models. Aiming at this problem, the experimental study and the argument are proposed in this paper. First, the theoretical model assumption is discussed based on the degradation mechanism. Second, the HEF stress experiments are carried out to acquire experimental data. Then the model fitting is processed. A three-phase model is proposed to describe threshold voltage degradation under HEF stress.
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页码:37 / 41
页数:5
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