Recent Developments in Hardware-in-the-Loop Testing

被引:7
|
作者
Millitzer, Jonathan [1 ]
Mayer, Dirk [1 ]
Henke, Christian [2 ]
Jersch, Torben [3 ]
Tamm, Christoph [1 ]
Michael, Jan [2 ]
Ranisch, Christopher [1 ]
机构
[1] Fraunhofer Inst Struct Durabil & Syst Reliabil LB, Darmstadt, Germany
[2] Fraunhofer Inst Mechatron Syst Design IEM, Paderborn, Germany
[3] Fraunhofer Inst Wind Energy & Energy Syst Technol, Bremerhaven, Germany
关键词
Hardware-in-the-loop; Hybrid testing; Real-time substructuring; Development of mechatronic systems; Early stage validation;
D O I
10.1007/978-3-319-74793-4_10
中图分类号
TH [机械、仪表工业];
学科分类号
0802 ;
摘要
Future applications of mechatronic systems will be characterized by a high degree of digitization enabling the integration of numerous innovative functions. The validation and reliability analysis of such complex systems often requires the realization of cost intensive full system prototypes and the evaluation of field tests. Innovative technologies are therefore integrated slowly in industrial sectors that focus on system reliability. Hence, there is a strong interest in a reliability orientated development and test process for complex mechatronic systems. The integration of real-time simulations in test environments allows efficient development and verification of the individual components of a mechatronic system in many cases. Currently, this especially applies for the test-driven development of embedded control units and their corresponding software. A reduced number of field tests, the automated run of test procedures and the application of error injection methods can be achieved by the widely used Hardware-in-the-Loop (HIL) technique. In signal level HIL tests, an existing control unit is connected to a virtual real-time simulation of the residual system. If however the device under test includes a mechanical or power electrical interface, the coupling of the test object to a virtual residual system requires the application of a mechanical or power electrical HIL interface. Current activities aim for this extension of In-the-Loop technologies for the validation of mechanical and power electronic subsystems. This paper highlights the potential of combined signal level, mechanical level and power electrical HIL tests for the validation of complex mechatronic systems in an early phase of design. The paper also points out the key topics of test-driven development, real-time simulation and the realization of hybrid test environments by means of mechanical and power electrical HIL interfaces.
引用
收藏
页码:65 / 73
页数:9
相关论文
共 50 条
  • [1] Hardware-in-the-loop testing of CSF shunts
    Manuel Gehlen
    Vartan Kurtcuoglu
    Marianne Schmid Daners
    [J]. Fluids and Barriers of the CNS, 12 (Suppl 1)
  • [2] A vision for automotive electronics hardware-in-the-loop testing
    Wagner, J
    Brunts, R
    Kaster, K
    Eagan, D
    Anthony, D
    [J]. INTERNATIONAL JOURNAL OF VEHICLE DESIGN, 1999, 22 (1-2) : 14 - 28
  • [3] Hardware-in-the-loop testing of an integrated starter generator
    Lucache, Dorin D.
    Horga, Vasile
    Ratoi, Marcel
    Albu, Mihai
    [J]. INTERNATIONAL AEGEAN CONFERENCE ON ELECTRICAL MACHINES AND POWER ELECTRONICS & ELECTROMOTION, PROCEEDINGS, 2007, : 363 - 368
  • [4] Hardware-in-The-Loop Testing of a Distance Protection Relay
    Camarillo-Penaranda, Juan R.
    Aredes, Mauricio
    Ramos, Gustavo
    [J]. IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 2021, 57 (03) : 2326 - 2331
  • [5] A framework for hardware-in-the-loop testing of an integrated architecture
    Schlager, Martin
    Obermaisser, Roman
    Elmenreich, Wilfried
    [J]. SOFTWARE TECHNOLOGIES FOR EMBEDDED AND UBIQUITOUS SYSTEMS, 2007, 4761 : 159 - +
  • [6] Hardware-in-the-loop testing of digital power controllers
    Jiang, ZH
    Dougal, RA
    Leonard, R
    Figueroa, H
    Monti, A
    [J]. APEC 2006: TWENTY-FIRST ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION, VOLS 1-3, 2006, : 901 - 906
  • [7] A LADAR scene projector for Hardware-In-The-Loop testing
    Cornell, MC
    Naumann, CB
    Stockbridge, R
    Snyder, DR
    [J]. TECHNOLOGIES FOR SYNTHETIC ENVIRONMENTS: HARDWARE-IN-THE-LOOP TESTING VII, 2002, 4717 : 77 - 85
  • [8] SYSTEM LEVEL HARDWARE-IN-THE-LOOP TESTING FOR CUBESATS
    Bingham, Bryan
    Weston, Cameron
    [J]. GUIDANCE, NAVIGATION, AND CONTROL 2014, 2014, 151 : 701 - 716
  • [9] Hardware-In-The-Loop Testing of PSS For Synchronous Generator
    Latha, Adharapurapu Hema
    Shubhanga, K. N.
    [J]. 2014 INTERNATIONAL CONFERENCE ON GREEN COMPUTING COMMUNICATION AND ELECTRICAL ENGINEERING (ICGCCEE), 2014,
  • [10] Hardware-in-the-loop for the design and testing of control systems
    [J]. 2016, Science and Engineering Research Support Society (09):