Cryptographic Hardware & Embedded Systems for Communications

This work is related to System-On-A-Chip architectures and design methodologies, for cryptographic algorithms implementations. Alternative approaches are presented, for architecture and architectures for block ciphers, stream ciphers, and hash functions. The presented algorithms are the most wide used, in all certain of modern applications. Implementation aspects are given for both ASIC and FPGA integration platforms. Synthesis results are illustrated in hardware terms. This work also introduces the basic principles of random number generators, which are fundamental primitives of security applications also. Comparisons of operating frequency, throughput and allocated resources are given in detail. Future directions in hardware and embedded systems design, concerning Arduino platforms and open source programming, are also given.