Design and Quantization Limits of Root Raised Cosine Digital Filter

The Root Raised Cosine digital filter is a widely used pulse-shaping FIR filter in digital baseband communication systems. The design parameters of the filter implementation are strongly bound to the overall performance of the communication system. In this paper, we focus on a design analysis of the filter taking into account the filter band attenuation, the oversampling symbol interpolation, the roll-off factor, the span truncation and the fixed-point quantization of the coefficients to draw an outline strategy of the filter implementation and to show the design performance bounds as function of design parameters. To verify the design limits of the filter a MATLAB numerical investigation is presented, showing the main results. Finally, results of the synthesis on a xc7a15t Xilinx Artix-7 FPGA of a polyphase implementation of the filter were presented.