A power-efficient design employing an extreme condition detector for embedded systems

被引：0

作者：

Oh, Hyukjun

Ahn, Heejune

Hong, Jiman ^{[1
]}

机构：

[1] Kwangwoon Univ, Seoul, South Korea

[2] Seoul Natl Univ Technol, Seoul, South Korea

来源：

COMPUTATIONAL SCIENCE AND ITS APPLICATIONS - ICCSA 2006, PT 4 | 2006年 / 3983卷

关键词：

D O I：

暂无

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

In this paper, a power-efficient scheme for embedded systems with wireless communication applications is proposed to reduce the power consumption of the overall system. Any transmission related module is required to be on only when the transmission is active and reliable to reduce power dissipation. The proposed method is based on the use of the extreme channel condition detector that is designed to detect the extremely bad channel condition. Under such a condition, carrying user information over the air link is completely impossible. The considerable power reduction is achieved by turning off several modules within the embedded system related to the information transmission like LCD, image encoder, voice encoder, and power amplifier under this condition. Moreover, a simple extreme channel condition detector is also proposed in this paper. The design example on the selected platform shows that the proposed scheme is very efficient in power saving for the embedded system.

引用

页码：603 / 611

页数：9

共 50 条

[1] Strategy for power-efficient design of parallel systems
Danckaert, K
Masselos, K
Catthoor, F
De Man, HJ
Goutis, C
[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 1999, 7 (02) : 258 - 265
[2] VLSI design of a power-efficient object detector using PCANet
Zhou, Yuteng
Huan, Xinming
[J]. IEICE ELECTRONICS EXPRESS, 2018, 15 (12):
[3] Multiple-valued caches for power-efficient embedded systems
Özer, E
Sendag, R
Gregg, D
[J]. 35th International Symposium on Multiple-Valued Logic, Proceedings, 2005, : 126 - 131
[4] Power-efficient prefetching for embedded processors
Zhuang, Xiaotong
Pande, Santosh
[J]. ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, 2007, 6 (01) : 3
[5] Power-efficient FIR filter architecture design for wireless embedded system
Lin, SF
Huang, SC
Yang, FS
Ku, CW
Chen, LG
[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2004, 51 (01) : 21 - 25
[6] Power-efficient asynchronous design
Liu, Yijun
Li, Zhenkun
Chen, Pinghua
Liu, Guangeong
[J]. 20TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS: TECHNOLOGY CHALLENGES IN THE NANOELECTRONICS ERA, 2007, : 451 - +
[7] Design and implementation in power-efficient and thermal conductivity of vedic processor for embedded applications
Prema, A.
Karthikeyan, A.
[J]. Thermal Science and Engineering Progress, 2024, 55
[8] DeAr: A Framework for Power-efficient and Flexible Embedded Digital Signal Processor Design
Lee, Chi-Ming
Huang, Yong-Jyun
Liu, Chih-Wei
Hsu, Yarsun
[J]. 2016 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS), 2016, : 658 - 661
[9] Power-efficient scheduling for heterogeneous distributed real-time embedded systems
Luo, Jiong
Jha, Niraj K.
[J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2007, 26 (06) : 1161 - 1170
[10] Bus power estimation and power-efficient bus arbitration for system-on-a-chip embedded systems
Ning, K
Kaeli, D
[J]. POWER-AWARE COMPUTER SYSTEMS, 2005, 3471 : 95 - 106

← 1 2 3 4 5 →