Low-Voltage Double-Gate ZnO Thin-Film Transistor Circuits

被引:29
|
作者
Li, Yuanyuan V. [1 ,2 ]
Ramirez, Jose Israel [1 ,2 ]
Sun, Kaige G. [1 ,2 ]
Jackson, Thomas N. [1 ,2 ]
机构
[1] Penn State Univ, Ctr Thin Film Devices, University Pk, PA 16802 USA
[2] Penn State Univ, Mat Res Inst, Dept Elect Engn, University Pk, PA 16802 USA
关键词
Double gate; low-power operated circuits; plasma-enhanced atomic layer deposition; thin-film transistors (TFTs); ZnO; FABRICATION; STABILITY;
D O I
10.1109/LED.2013.2263193
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this letter, we report double-gate ZnO thin-film transistor (TFT) circuits deposited by plasma-enhanced atomic layer deposition that are suitable for low-voltage operation. Compared to bottom-gate-only ZnO TFTs, double-gate ZnO TFTs have improved mobility, subthreshold slope, and bias stability. In this letter, the TFT top gate is used to adjust the bottom-gate turn-on and threshold voltage. This allows the logic transition point for circuits to be adjusted for operation at a low voltage. Using this approach, high-gain inverters (gain > 100) and low-voltage ring oscillators using double-gate TFTs have been demonstrated. Double-gate inverters with a beta ratio of 5 have a gain larger than 100. Fifteen-stage double-gate ZnO TFT ring oscillators operate with V-DD = 1.5 V, I-D = 28 mu A, and propagation delay of 2 mu s per stage.
引用
收藏
页码:891 / 893
页数:3
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