Design of Class-E Power VCO in 65nm CMOS technology:: Application to RF transmitter architecture

被引：8

作者：

Deltimple, Nathalie ^{[1
]}

Deval, Yann ^{[1
]}

Belot, Didier ^{[2
]}

Kerherve, Eric ^{[1
]}

机构：

[1] Univ Bordeaux ENSEIRB, CNRS UMR 5218, IMS Lab, Talence, France

[2] STMicroelect, Grenoble, France

来源：

PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10 | 2008年

关键词：

D O I：

10.1109/ISCAS.2008.4541585

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper investigates the feasibility of designing a RE TX architecture based on a Power VCO, operating at 1.95 GHz for UMTS/WCDMA standard. The Power VCO uses 2.5 V supply voltage and is designed using 65nm CMOS technology from ST Microelectronics. The Power VCO is made up of an oscillating Power Amplifier (PA). In order to fulfil UMTS/W-CDMA requirements, especially on output power with regards to efficiency to save battery life, the used PA is a two-stage Class E PA. The output 1 dB compression point (CP1) is 22 dBm and Power Added Efficiency (PAE) @CP1 is 55.1%. This PA is then included in a loop to realize oscillation condition. The Power VCO oscillates @ 1.95GHz, achieves an output power of 23.3dBm with 60.3% PAE.

引用

页码：984 / +

页数：2

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