Graphene nanoribbon based negative resistance device for ultra-low voltage digital logic applications

被引:31
|
作者
Khatami, Yasin [1 ]
Kang, Jiahao [1 ]
Banerjee, Kaustav [1 ]
机构
[1] Univ Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93106 USA
基金
美国国家科学基金会;
关键词
Memory architecture - Random access storage - Semiconductor storage - Digital devices - Computer circuits - Nanoribbons - Negative resistance;
D O I
10.1063/1.4788684
中图分类号
O59 [应用物理学];
学科分类号
摘要
Negative resistance devices offer opportunities in design of compact and fast analog and digital circuits. However, their implementation in logic applications has been limited due to their small ON current to OFF current ratios (peak to valley ratio). In this paper, a design for a 2-port negative resistance device based on arm-chair graphene nanoribbon is presented. The proposed structure takes advantage of electrostatic doping, and offers high ON current (similar to 700 mu A/mu m) as well as ON current to OFF current ratio of more than 10(5). The effects of several design parameters such as doping profile, gate workfunction, bandgap, and hetero-interface characteristics are investigated to improve the performance of the proposed devices. The proposed device offers high flexibility in terms of the design and optimization, and is suitable for digital logic applications. A complementary logic is developed based on the proposed device, which can be operated down to 200mV of supply voltage. The complementary logic is used in design of an ultra-compact bi-stable switching static memory cell. Due to its compactness and high drive current, the proposed memory cell can outperform the conventional static random access memory cells in terms of switching speed and power consumption. (C) 2013 American Institute of Physics. [http://dx.doi.org/10.1063/1.4788684]
引用
下载
收藏
页数:5
相关论文
共 50 条
  • [1] Graphene nanoribbon as a negative differential resistance device
    Ren, Hao
    Li, Qun-Xiang
    Luo, Yi
    Yang, Jinlong
    APPLIED PHYSICS LETTERS, 2009, 94 (17)
  • [2] Ultra-Low Voltage CMOS Logic Circuits
    Melek, Luiz A. P.
    Schneider, Marcio C.
    Galup-Montoro, Carlos
    PROCEEDINGS OF THE 2014 ARGENTINE SCHOOL OF MICRO-NANOELECTRONICS, TECHNOLOGY AND APPLICATIONS (EAMTA), 2014, : 1 - 7
  • [3] Ultra-Low Power All Spin Logic Device Acceleration based on Voltage Controlled Magnetic Anisotropy
    Zhang, Zhizhong
    Zhang, Yue
    Yue, Lei
    Su, Li
    Shi, Yichuan
    Zhang, Youguang
    Zhao, Weisheng
    PROCEEDINGS OF THE 2016 IEEE/ACM INTERNATIONAL SYMPOSIUM ON NANOSCALE ARCHITECTURES (NANOARCH), 2016, : 141 - 142
  • [4] Graphene Nanoribbon Field Effect Transistor based Ultra-Low Energy SRAM Design
    Joshi, Shital
    Mohanty, Saraju P.
    Kougianos, Elias
    Yanambaka, Venkata P.
    PROCEEDINGS OF 2016 IEEE INTERNATIONAL SYMPOSIUM ON NANOELECTRONIC AND INFORMATION SYSTEMS (INIS), 2016, : 76 - 79
  • [5] Ultra-Low Power and Ultra-Low Voltage Devices and Circuits for IoT Applications
    Hiramoto, T.
    Takeuchi, K.
    Mizutani, T.
    Ueda, A.
    Saraya, T.
    Kobayashi, M.
    Yamamoto, Y.
    Makiyama, H.
    Yamashita, T.
    Oda, H.
    Kamohara, S.
    Sugii, N.
    Yamaguchi, Y.
    2016 IEEE SILICON NANOELECTRONICS WORKSHOP (SNW), 2016, : 146 - 147
  • [6] Ultra-low power digital subthreshold logic circuits
    Soeleman, Hendrawan
    Roy, Kaushik
    Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers, 1999, : 94 - 96
  • [7] An Ultra-low Voltage, VCO-based ADC with Digital Background Calibration
    Narasimman, Neelakantan
    Kim, Tony T.
    2016 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2016, : 1458 - 1461
  • [8] Digital Ultra Low Voltage High Speed Logic
    Mirmotahari, Omid
    Berg, Yngvar
    IMECS 2009: INTERNATIONAL MULTI-CONFERENCE OF ENGINEERS AND COMPUTER SCIENTISTS, VOLS I AND II, 2009, : 1454 - 1458
  • [9] Negative Capacitance Enhanced All Spin Logic Devices With an Ultra-Low 1 mV Working Voltage
    Gao, Tianqi
    Zeng, Lang
    Zhang, Deming
    Qin, Xiaowan
    Long, Mingzhi
    Zhang, Yue
    Lin, Xiaoyang
    Zhang, Youguang
    Zhao, Weisheng
    IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2018, 6 (01): : 245 - 249
  • [10] TBAL: Tunnel FET-Based Adiabatic Logic for Energy-Efficient, Ultra-Low Voltage IoT Applications
    Liu, Jheng-Sin
    Clavel, Michael B.
    Hudait, Mantu K.
    IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2019, 7 (01): : 210 - 218