Adjacent Common Centroid Placement for Analog IC Layout Design

被引:0
|
作者
Murotatsu, Kenichiro [1 ]
Fujiyoshi, Kunihiro [1 ]
机构
[1] Tokyo Univ Agr & Technol, Dept Elect & Elect Engn, Fuchu, Tokyo 183, Japan
来源
2014 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS) | 2014年
关键词
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
To improve immunity against process gradients, common centroid constraint, in which every pair of elements should be placed symmetrically with respect to a common center point, is widely used. Several methods to obtain a good placement satisfying the constraint by using sequence-pair and Simulated Annealing were proposed. However, cells in a common centroid group should be placed close to the common center point of the group. In this paper, we propose methods which use mathematical-programming and can place cells in each group close to the common center point, and check the effectiveness of the methods by experimental comparisons.
引用
收藏
页码:619 / 622
页数:4
相关论文
共 50 条
  • [1] Average Placement Method with Common Centroid Constraints for Analog IC Layout Design
    Fujiyoshi, Kunihiro
    Ue, Keitaro
    2014 IEEE 57TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2014, : 226 - 229
  • [2] A Method of Analog IC Placement with Common Centroid Constraints
    Ue, Keitaro
    Fujiyoshi, Kunihiro
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2014, E97A (01) : 339 - 346
  • [3] Analog placement with common centroid constraints
    Ma, Qiang
    Young, Evangeline F. Y.
    Pun, K. P.
    IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN DIGEST OF TECHNICAL PAPERS, VOLS 1 AND 2, 2007, : 579 - +
  • [4] On the Exploration of Design Tradeoffs in Analog IC Placement with Layout-dependent Effects
    Martins, Ricardo
    Lourenco, Nuno
    Povoa, Ricardo
    Horta, Nuno
    2019 16TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD 2019), 2019, : 25 - 28
  • [5] A current-path based placement methodology for analog IC layout design
    Lin, Zhi-Ming
    Liao, Mei-Yuan
    Huang, Kuei-Chen
    Advances in Physics, Electronics and Signal Processing Applications, 2000, : 94 - 97
  • [6] Placement with Symmetry Constraints for Analog IC Layout Design Based on Tree Representation
    Hirakawa, Natsumi
    Fujiyoshi, Kunihiro
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2009, E92A (02) : 467 - 474
  • [7] Analog Placement with Common Centroid and 1-D Symmetry Constraints
    Xiao, Linfu
    Young, Evangeline F. Y.
    PROCEEDINGS OF THE ASP-DAC 2009: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 2009, 2009, : 353 - 360
  • [8] PLACEMENT ALGORITHM FOR AUTOMATIC IC LAYOUT DESIGN SYSTEM.
    Kubiak, Roman
    Ciesielski, Maciej
    1978, 2 (03): : 249 - 267
  • [10] Automating the construction of centroid structures in the layout design of precision elements of analog chips
    I. V. Lobskaya
    Journal of Communications Technology and Electronics, 2007, 52 : 1418 - 1421