New Design of A Three-terminal Memristor Emulator

An emulator circuit is newly designed in this paper by making use of common off-the-shelf active devices for mimicking the dynamic behaviors of the three-terminal memristors (3T-MRs). The theoretical calculation shows that the equivalent memductance of the 3T-MRs emulator can be flexibly controlled by imposing excitation voltage with different amplitude, frequency and duty cycle on the third terminal. For the purpose of testing the controllability and emulation performance of the proposed emulator, simulation investigation is carried out based on PSpice software. The simulation results show good agreement with theoretical analysis, which confirms that the memductance of this 3T-MRs emulator can he conveniently controlled and can be utilized for further investigating the dynamic behaviors of 3T-MRs.