A SoC Design and Implementation of H.264 Video Encoding System Based on FPGA

被引:0
|
作者
Li, Zhenni [1 ]
Li, Jingjiao [1 ]
Zhao, Yue [1 ]
Rong, Chaoqun [1 ]
Ma, Ji [1 ]
机构
[1] Northeastern Univ, Coll Informat Sci & Engn, Shenyang, Peoples R China
关键词
SoC; H.264; CAVLC; AXI; Zynq;
D O I
10.1109/IHMSC.2014.179
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
A SoC design of H.264 Video Encoding system is implemented based on FPGA in this paper. Intra prediction algorithm and baseline profile is selected, and H.264 encoder algorithm is designed as an IP core and embedded to the SoC through the interconnect interface AMBA AXI bus. The SoC is implemented on Xilinx Zynq-7000 FPGA and each functional module is simulated by Modelsim and tested within the SoC platform. Comparing to the existing H.264 Video Encoding system based on ARM or DSP, results indicate that this special SoC could fully shows its advantage in high-speed and flexibility. Also the implemented system could meet the required rate for the processing of HD-1080 format video sequence.
引用
收藏
页码:321 / 324
页数:4
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