Systematic Design of High-Performance Hybrid Cascaded Multilevel Inverters With Active Voltage Balance and Minimum Switching Losses

被引:71
|
作者
Mariethoz, Sebastien [1 ]
机构
[1] ETH, Automat Control Lab, CH-8092 Zurich, Switzerland
关键词
AC-DC power converters; asymmetrical multilevel inverters; cascade multilevel inverters; hybrid multilevel inverters; multilevel converters; multilevel topologies; pulse width modulation converters; series connected converters; CONVERTERS;
D O I
10.1109/TPEL.2012.2222446
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Hybrid cascade multilevel inverters combine semiconductor devices of different voltage ratings and technologies, which theoretically allow high efficiency to be achieved. The bottlenecks of these topologies are, however, the need for isolated supplies for the cells and the lack of modularity. This paper focuses on the design and control of high-resolution, high-efficiency multilevel inverters with simplified dc power supplies. It introduces several rules for systematically designing the dc voltages of the cells, for which all unsupplied capacitor voltages can be regulated. Six classes of inverters are obtained covering single- and three-phase, staircase and pulsewidth-modulated (PWM) inverters. New configurations of hybrid cascade multilevel inverters are obtained for each class. A double modulation strategy with two different frequencies is proposed that allows switching losses of PWM inverters to be reduced. Decoupled mechanisms are proposed for the total and internal energy balances. It is shown how to make the design robust by taking into account conversion losses and large dc-voltage imbalances in the design and control. An analysis of the maximum voltage utilization and efficiency of the resulting configurations is carried out. The effectiveness of the novel concepts is validated experimentally for two of the proposed topologies.
引用
收藏
页码:3100 / 3113
页数:14
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