Design of A Fully-Digital Class-D Audio Power Amplifier Based on Open-loop Configuration

被引：0

作者：

Lin, Liyu ^{[1
]}

Wu, Xiaobo ^{[1
]}

Zhao, Jinchen ^{[1
]}

Zhao, Menglian ^{[1
]}

机构：

[1] Zhejiang Univ, Inst VLSI design, Hangzhou 310003, Zhejiang, Peoples R China

来源：

2012 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID STATE CIRCUIT (EDSSC) | 2012年

关键词：

class-D amplifier; pulse width modulation (PWM); noise shaper; harmonic distortion; linearization; PULSE-WIDTH MODULATION;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A fully-digital open-loop class-D audio power amplifier is presented. By using the proposed error feedback structure, the Delta Sigma noise shaper reduces the word length of the input signal while maintaining its precision. An optimized compensation algorithm based on 2x interpolation linearization is proposed to improve the total harmonic distortion (THD), as well as to reduce its hardware overhead. The whole system has been implemented in the standard SMIC 0.18 mu m 1P6M Logic Salicide process. The test results show that the system achieves a maximal SNDR of 82.9dB and a dynamic range of 83.7dB with a power consumption of 0.12mW under a supply voltage of 1.8V, which is suitable for the application of high-fidelity audio systems.

引用

页数：3

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