Hermetic Wafer Level Thin Film Packaging for MEMS

被引：2

作者：

Soon, Jeffrey Bo Woon ^{[1
]}

Singh, Navab ^{[1
]}

Calayir, Enes ^{[2
]}

Fedder, Gary K. ^{[2
]}

Piazza, Gianluca ^{[2
]}

机构：

[1] ASTAR, Inst Microelect, Singapore 117685, Singapore

[2] Carnegie Mellon Univ, Dept Elect & Comp Engn, Pittsburgh, PA 15213 USA

来源：

2016 IEEE 66TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC) | 2016年

关键词：

component; Wafer level packaging (WLP); MEMS; Hermetic sealing; MEMS packaging;

D O I：

10.1109/ECTC.2016.317

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We report a hermetic thin film packaging on aluminum nitride AlN RF MEMS platforms that is entirely CMOS compatible and wafer level executed. The process flow, including release of multiple free-moving body and encapsulation of the functional structures are demonstrated using 8" wafer level thin film micromachining technology. The encapsulated devices are reported to survive post CMOS assembly processes such as wafer level dicing and flip-chip bonding. Both fabrication outcome and measurement results indicate high possibility in cost effective and footprint reduction in MEMS integration technology.

引用

页码：857 / 862

页数：6

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