Neutral Point Voltage Level Stabilization and DC Link Capacitors Voltage Balance in Neutral Point Clamped Multilevel Inverters

被引:0
|
作者
Krishna, Gandla Radha [1 ]
Anuradha, K. [1 ]
机构
[1] VNR VJIET, EEE, Hyderabad, Andhra Pradesh, India
关键词
Capacitor Voltage Equalization; Diode-Clamped Multilevel Inverter (DCMLI)/Neutral Point Clamped (NPC) Inverter; Equalizing Circuit; Bias Value (B); Sinusoidal Pulse Width Modulation (SPWM); Total Harmonic Distortion (THD);
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The Neutral point clamped (NPC) inverter has unbalancing problems of neutral point voltage and DC link capacitors voltages, generally dc link capacitor voltage unbalance leads to neutral point voltage unbalance. In this paper neutral point voltage is balanced using sine PWM associated with phase shift technique. But for NPC inverters with more than three level even though neutral point voltage is balanced dc link capacitor voltages are unbalanced and neutral point voltage varies with a wide range, Hence a control strategy is proposed in this paper for controlling both problems and is applied for NPC three level, five level, seven level and nine level inverter. Simulation results are presented to show effectiveness of proposed equalizing control circuits. Total harmonic distortion (THD) values are observed for the developed control technique.
引用
收藏
页码:838 / 843
页数:6
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