Analysis of Phase Locked Loop (PLL) Influence on DQ Impedance Measurement in Three-phase AC Systems

AC small signal stability of three-phase systems can be analyzed using the load and source impedances in the d-q synchronous reference frame and many solutions have been recently proposed to measure d-q impedances. One fundamental part of the measurement system is the Phase-Looked Loop (PLL), which tracks the supply voltage phase in order to transform voltage and current terms from abc to dq coordinates. This paper analyzes the influence of PLL dynamics on the accuracy of the impedance measurement results, focusing on two errors: 1) on the generation of voltage/current perturbation, 2) on the measured voltage and current components used for impedance extraction. The analysis shows that PLL has a small influence on the voltage/current injection and a more relevant one on the voltage and current measurements. For this reason, the PLL bandwidth in existing systems is much smaller than the lowest frequency of the measured impedance, strongly increasing the measurement time. However, PLL's effect can be compensated off-line with the use of derived analytical expressions, enabling a higher PLL bandwidth and a significantly faster measurement system. The proposed approach is verified by simulation.